Wireless communication transceivers are commonly used in applications that require very low levels of power consumption, such as in smart electric grid wireless networks, wireless sensor networks, point-to-point data links, data streaming applications, and mobile/hand-held communications devices. A wireless sensor network, for example, may budget the power consumption of a wireless transceiver (operating in receive mode) to a maximum of only 22 mW.
The frequency of a wireless communication transceiver plays a large role in the transceiver's power consumption. Frequency planning in wireless transceivers, therefore, is a critical design aspect and must be considered when the transceiver architecture is chosen. An important aspect of frequency planning is the relationship between the operating frequency range of the transceiver and the fundamental frequency of the transceiver's local oscillator (LO), especially for direct-conversion (i.e., homodyne) receivers and transmitters.
The LO frequency of direct-conversion transceivers is typically chosen to be twice (or other multiple of) the operating frequency of the transceiver. This multiplication of LO frequency minimizes the radiation emitted by the LO to the receiver inputs and thus avoid the generation of detrimental time-varying offsets capable of saturating the transceiver. The multiplied LO frequency also reduces the “frequency pulling effect” of the LO by the turning on of the transceiver's high power amplifier. Because the LO frequency is multiplied, a frequency divider is needed downstream to divide the LO frequency by two (or other multiple) to generate the correct frequency for the receiver or transmitter circuitry. The frequency divider may serve other functions in the transceiver, such as generating quadrature signals necessary for the receiver and the transmitter.
A frequency divider is typically the most power-consuming component in a wireless transceiver at least because the frequency divider operates at the highest frequency in the transceiver. Furthermore, prior-art frequency dividers function at a fixed operating/bias point. Because the frequency divider must operate reliably at a worst-case condition (e.g., at high temperature, low voltage, and a slow process corner), the fixed operating/bias point must be selected at the worst-case point. This design or safety margin is exacerbated by inaccuracies in computer modeling and simulation of the circuit, which must also be accounted for. A prior-art frequency divider operating under typical or fast conditions, therefore, will consume more power than is necessary for reliable functionality—in some cases, as much as 60% more than necessary.
Another source of power consumption in prior-art wireless communication transceivers comes from LO buffers used to distribute the LO signal to the frequency dividers. These LO buffers also operate at twice the operating frequency of the transceiver and, therefore, also consume a substantial amount of power.
Although the power consumption of a frequency divider may be reduced by the use of certain components, such as inductive elements that resonate with (and reduce the effects of) parasitic capacitances, these components are expensive to include due at least to their large size (which may occupy an unacceptably large portion of expensive silicon area). Clearly, a need exists for a frequency divider that is both low-power and low-cost.